TSMC next week ahead of the trial production of 2nm chips, South Korea and Japan step by step to follow

Despite the growing sense of "word play" in chip process naming, semiconductor giants still want to take the lead in mass production schedules. Recently, Taiwan media revealed that chip foundry giant TSMC plans to start trial production of 2nm process next week, which is another key node since the company's mass production of 3nm a year and a half ago, is expected to improve the performance of 2nm under the same power consumption by 10-15% compared with 3nm, and reduce the power consumption under the same performance by 25-30%. Unlike usual, TSMC this time is ahead of the trial production, which is a quarter ahead of the previous planned trial production point in October. This may have the reason for TSMC's own progress, but it may also be forced by competitors.

With the higher and higher cost of advanced processes below 7nm and lower cost performance, users in mobile phones, AI and other industries are not interested in more advanced processes, such as TSMC 3nm currently has only Apple as a big customer, and even AI giant NVIDIA mainly uses 4nm. Therefore, TSMC released the news of 2nm trial production in advance, which is likely to prepare for competing for the few 2nm process customers. Yes, TSMC also has to compete for customers. Because there is more than one chip giant in the layout of 2nm, and each of them is strong. Just last month, the US chip giant Intel announced that the large-scale mass production of Intel 3 process (similar to 3nm) on schedule, although it is more than a year later than TSMC's 3nm mass production time, but according to the Intel technology roadmap, the company is also ready to produce Intel 20A process (equivalent to 2nm) in the second half of 2024. The rhythm is almost identical to that of TSMC.

Intel chip process diagram

After years of "pushing toothpaste" on 14nm, Intel has continued to make efforts on advanced manufacturing processes in the last two years, bought the most expensive high numerical aperture EUV lithography machine ($380 million per unit), and is ambitious in the chip foundry field led by TSMC and Samsung. In March last year, Song Jiqiang, director of Intel China Research Institute, told the Observer network that the company is accelerating Moore's Law through the "four years and five nodes" plan, "I believe that by 2025, Intel can regain the leading position in process and transistor manufacturing through the Intel 18A (1.8nm) node." At that time, Intel will open the "Amy era" of semiconductors. South Korea's Samsung is also a 2nm competitor. After two years of 3nm mass production, Samsung announced on July 9 that it will contract 2nm process chips for PFN, a Japanese artificial intelligence company, for PFN's high-performance computing hardware to build large language models. In the eyes of some industry analysts, the contract represents Samsung's impact on TSMC's market dominance, and may even rewrite the landscape. But Samsung's tricky problem is the yield, and in February this year, Korean media even reported that Samsung's 3nm yield was 0. From the perspective of competition in the global chip foundry market in the first quarter of this year, Samsung's share still hovers at 13%, far lower than TSMC's 62%, and SMIC ranks third with 6%. It is hard for many people to imagine that Japan, which has left advanced chip manufacturing for many years, also wants to catch up in the 2nm era. Just over half a month ago, Japanese government-backed Rapidus announced that the company's 2nm process test plant will start up in April 2025. The company has also received support from Belgium's Microelectronics Research Center (imec) and IBM of the United States to try to narrow the gap with TSMC in the future. Although the giants have launched a race for 2nm, seeing it as a strategic competition, their biggest problem is who to sell the expensive chips to. At the end of last year, semiconductor research institute IBS released a report that the manufacturing cost of the 2nm process will rise by up to 50% compared with the 3nm process, resulting in the price of 2nm wafers will reach $30,000 / piece, and the cost of the 3nm process has doubled compared with the 7nm process. The agency estimates that it would cost about $28 billion to build a plant with a monthly capacity of 50,000 wafers at 2nm and $20 billion at 3nm.

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In the context of Moore's Law slowdown, the performance improvements brought by process miniaturization are no longer considerable, and who is willing to pay for the high costs? Moreover, the process is increasingly becoming the "nano-lie" of the chip giants. Two years ago, market research firm TechInsights reported that Samsung and TSMC both let customers claim they were using 4nm technology when they were still using 5nm technology. This involved chip giants such as Apple, Qualcomm and Mediatek, which the agency said had teamed up to create "nanolies" about chips. "Why bear the extra cost of 4nm technology when you can rename an older process?" Blatantly re-labeling a 5-nanometer process as a 4-nanometer process removes the last shred of meaning from node numbering. So when a foundry claims that it has reached the next level, do not believe it until the machine is dismantled and confirmed." TechInsights speaks bluntly. From the current planning point of view, Qualcomm will launch a new flagship mobile phone processor Snapdragon 8 Gen 4 in the second half of this year, is expected to use TSMC's improved version of 3nm "N3E" process, foreign digital bloggers revealed that the chip will be 25-30% higher than the previous generation, is expected to sell for $220-240 (about 1600 yuan -1800 yuan). Mediatek's first 3nm flagship is expected to debut at the same time.

TSMC and Samsung have long mass-produced 3nm, Qualcomm and Mediatek, two large mobile phone customers, began to use it until the second half of this year, showing that 3nm is not active, and it is expected that the Android flagship mobile phone market will still be dominated by 3nm processors next year. This also means that even if TSMC mass-produces a 2nm process next year, the big customer is likely to still have only Apple. In the first quarter of this year, the 3nm process, which has been in mass production for a year and a half, contributed only 9% of TSMC's revenue, compared with 37% for 5nm and 19% for 7nm. Pan Gongyu, a researcher at the Observer network Mental Observation Institute, said that Apple has long been TSMC's largest customer, accounting for almost a quarter of TSMC's revenue last year, ahead of the second-largest customer Nvidia (accounting for about 11%). And Apple's annual high-end flagship machine has become TSMC's most advanced process application and the best marketing partner. The outside world has formed an "iPhone Pro&X nano" model to infer TSMC process advancement rhythm. Previously, TSMC's 3nm process slowed down the launch time of the iPhone Pro version because of the cost problem caused by the number of exposure layers, which was once ridiculed by the outside world. This time TSMC claims that the 2nm process trial production time is earlier than expected, is also a kind of marketing, but certainly learned the lessons of 3nm, 2nm with Nanosheet architecture, its transistor density, performance, power consumption than the 3nm process to improve how much, yet to be tested by various evaluation institutions. To be sure, as Moore's Law slows down, chip giants are bound to spend more effort in marketing advanced processes, even at the expense of creating more "nanolies." Whether consumers are willing to pay for this depends on the final market feedback.

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